Safety-critical real-time operating system (RTOS) for RISC-V microprocessors introduced by Green Hills

Nov. 4, 2021
The RISC-V open-systems standard instruction set architecture is based on established reduced instruction set computer (RISC) principles.

SANTA BARBARA, Calif. – Green Hills Software in Santa Barbara, Calif., is introducing the security- and safety-critical INTEGRITY real-time operating system (RTOS) for microprocessors that use the RISC-V open-standard instruction set architecture based on established reduced instruction set computer (RISC) principles.

INTEGRITY for RISC-V can enable electronics manufacturers to build and deploy security- and safety-critical high performant RISC-V embedded processors with the same trusted software foundation that runs and protects millions of today's critical systems in aircraft, cars, trains, secure phones, and surgical devices.

INTEGRITY is integrated with RISC-V processor solutions including hardware reference boards from Microchip and SiFive, along with processor intellectual property (IP) from SiFive, a RISC-V IP provider.

Related: Green Hills helps usher-in new era of safety-critical real-time software for multicore jetliner avionics

This support can help device manufacturers reduce the time, cost, and complexity of developing and deploying critical software for military, industrial, automotive, and IoT applications based on the RISC-V processor architecture.

INTEGRITY is based on a separation kernel architecture that provides resource guarantees, hard real-time determinism, security, and safety. The MULTI debugger and C/C++ compilers can help eliminate difficult software bugs on complex RISC-V systems on chip with heterogenous cores.

For more information contact Green Hills Software online at www.ghs.com.

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